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High Volume Diagnosis in Memory BIST Based on Compressed Failure Data

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Embedded memories are increasingly identi“ed as
having potential for introducing new yield loss mechanisms at a
rate, magnitude, and complexity large enough to demand major
changes in fault diagnosis techniques. In particular, time-related
or complex read faults that originate in the highest density areas
of semiconductor designs require new methods to diagnose more
complex faults affecting large groups of memory cells. This paper
presents a built-in self-test (BIST)-based fault diagnosis scheme
that can be used to identify a variety of failures in embedded
random-access memory arrays. The proposed solution employs
”exible test logic to record test responses at the system speed
with no interruptions of a BIST session. It offers a simple test
”ow and enables detection of time-related faults. Furthermore,
the way test responses are processed allows accurate and time-
ef“cient reconstruction of error bitmaps. The proposed diagnos-
tic algorithms use a number of techniques, including discrete
logarithm-based counting with ring generators acting as very
fast event counters and signature analyzers. Experimental results
con“rm high diagnostic accuracy of the proposed scheme and its
time ef“ciency.

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Filed in: IEEE Projects

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